Presently, field effect thin film transistors (hereinafter will be referred to as TFTs as the case may be) are being suitably used as driving devices for use in flat panel displays and the like. Though various TFT configurations have been proposed, TFTs generally have a basic configuration wherein current passing between source and drain electrodes in contact with a semiconductor layer is controlled by means of voltage applied to a gate electrode formed on the semiconductor layer via an insulating layer (that is, by means of an electric field generated by the applied voltage). Usually, such a TFT is fabricated using a thin film control process by which layers on a substrate are processed and formed under precise control. Such TFTs call for excellent electrical characteristics and highly reliable stability. In TFTs that have been put to practical use, the semiconductor layer comprises amorphous silicon (a-Si:H) or low-temperature formed polysilicon and the gate insulator comprises silicon oxide or silicon nitride. Because various materials and processing methods for forming an active-matrix liquid crystal display (AMLCD) based on an amorphous silicon (a-Si:H) or low-temperature formed polysilicon device require many fabrication process steps at high temperatures, a large number of substrate materials that are otherwise useful cannot be employed.
With the progress of the flat panel display technology, a request has arisen that the substrate have a lighter weight, mechanical flexibility and impact resistance, along with a request for resources saving. Also, demands exist for realization of sheet-like or paper-like displays or portable equipment and the like. However, plastic sheets or resin films for AMLCDs which are useful to meet such demands or requests are difficult to use in fabrication process steps at temperatures of from 150° to 250° or higher.
In recent years, organic semiconductor TFTs have been under research which utilizes an organic semiconductor comprising an organic material base having semiconductor properties instead of the aforementioned semiconductors such as amorphous silicon and low-temperature formed polysilicon. The use of such an organic material allows these devices to be fabricated without the need to prepare highly costly equipment that is needed for the silicon-using process. Such a device is improved in mechanical flexibility and can be fabricated by a process at room temperature or a low temperature close to room temperature. Thus, a flexible plastic substrate or resin film can be used as a substrate for use in a sheet-like or paper-like display or a like device.
In a conventionally known TFT having a semiconductor layer comprising such a low-molecular-weight organic semiconductor material as pentacene, the organic semiconductor layer has a single-crystalline or polycrystalline phase. Such a TFT is lower in carrier mobility than a TFT having a silicon-type semiconductor layer and can obtain a carrier mobility value as low as about 0.1-0.6 cm2/Vs. If the organic semiconductor layer has increased grain boundary or lowered crystallinity, the organic semiconductor layer has further lowered carrier mobility and hence cannot be used as a TFT.
Such a polymer-type organic semiconductor material as a thiophene material can also be used. However, such a material is low in carrier mobility since the material is amorphous (see, for example, Takeo Kawase and two others, IDW '02, AMD2/EP1-1, pp. 219-222, Polymer Semiconductor Active-Matrix Backplane Fabricated by Ink-Jet Technique” (non-patent document 1)). According to non-patent document 1, a TFT having a semiconductor layer comprising a fluorene-bithiophene copolymer exhibits a value of carrier mobility as low as 0.003-0.005 cm2/Vs at channel.
A TFT having a semiconductor layer exhibiting such a low carrier mobility as taught by non-patent document 1 is not practical because the TFT usually needs to have an extremely large gate width of about several hundred μm. Also, with such a polymer-type organic semiconductor having a low carrier mobility, the spacing between the source electrode and the drain electrode need be very short, which requires extremely fine microfabrication. This is not practical. A TFT having a semiconductor layer comprising only such a polymer-type organic semiconductor as a thiophene material has a low carrier mobility at channel and low on-conductivity though exhibiting high off-resistance and high peel strength between the semiconductor layer and an insulating layer.
In contrast, a TFT having a semiconductor layer comprising carbon nanotube, which has a nanostructure, is under study recently, is formed from carbon, exhibits very good electric conductivity and has tough characteristics, has obtained a value of carrier mobility as high as about 1000-1500 cm2/Vs (see, for example, Sami Rosenblatt and five others, Nano Lett. 2, pp. 869-872 (2002), “High Performance Electrolyte Gated Carbon Nanotube Transistors” (non-patent document 2). Also, a report has been made of a TFT structure having a semiconductor layer comprising semiconductor-type carbon nanotube that is considered to have such a high value of carrier mobility as mentioned in non-patent document 2 and a fabrication method thereof (see, for example, Phaedon Avouris, Chem. Phys. 281, pp. 429-445 (2002), FIG. 6, “Carbon nanotube electronics” (non-patent document 3).
FIG. 15 is a sectional view schematically showing the construction of a conventional TFT having a semiconductor layer comprising carbon nanotubes. According to non-patent document 3, TFT 60 as shown in FIG. 15 includes a 150 nm-thick gate insulator 62 comprising thermally oxidized silicon formed on a p+-silicon substrate 61 which serves also as a gate electrode, and a 1.4 nm-thick semiconductor layer 63 formed by dispersing semiconductor-type carbon nanotubes of 1.4 nm diameter on the gate insulator 62 at an appropriate dispersion density. Further, a metal such as titanium (Ti) or cobalt (Co) is deposited on the semiconductor layer 63 by evaporation to form source electrode 64 and drain electrode 65 on opposite sides of contact portions 66 and 67 in contact with the carbon nanotubes, thus forming a TFT having low junction resistance and a good transconductance characteristic.
Such a TFT having a semiconductor layer comprising only nanotubes has high carrier mobility at channel and high on-conductivity but suffers from poor peel strength due to the semiconductor layer 63 formed by merely placing the nanotubes on the gate insulator 62 and is difficult to fabricate.
In the step of forming a 1.4 nm-thick semiconductor layer by dispersing nanotubes, such as carbon nanotubes, of 1.4 nm-diameter at an appropriate dispersion density as in non-patent document 3, it is actually difficult to increase the nanotube dispersion density and keep the increased density constant. Further, the process of arranging multiple nanotubes of nanostructure side by side without overlapping them each other is an unstable factor which raises a problem of large variations in TFT electrical characteristics.